Course Details

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Course Information
SemesterCourse Unit CodeCourse Unit TitleT+P+LCreditNumber of ECTS CreditsLast Updated Date
4EE203DIGITAL DESIGN3+0+03414.08.2025

 
Course Details
Language of Instruction English
Level of Course Unit Bachelor's Degree
Department / Program ELECTRICAL-ELECTRONICS ENGINEERING
Type of Program Formal Education
Type of Course Unit Compulsory
Course Delivery Method Face To Face
Objectives of the Course (1) to understand the fundamental concepts in digital logic design.
(2) to apply the obtained knowledge for analysis and design of digital logic circuits.
(3) to identify, design, and implement a digital logic system that solves a real world problem.
(4) to use design processes, techniques, skills, and computer tools to solve a real-world problem.
Course Content This course introduces the fundamentals of digital logic design. The topics include number systems, Boolean algebra, logic gates, combinational logic design, logic circuit simplification, latches and flip-flops, sequential logic design, registers, counters, arithmetic logic design, state machines, register transfer, and single-cycle computer.
Course Methods and Techniques
Prerequisites and co-requisities None
Course Coordinator None
Name of Lecturers Asist Prof.Dr. Dooyoung Hah
Asist Prof.Dr. BURAK ÜNAL unal.burak@agu.edu.tr
Assistants None
Work Placement(s) No

Recommended or Required Reading
Resources Binary Numbers Boolean algebra Logic simplification Canonical form, Combinational Logic Design Examples, K-Maps Sequential logic – registers and counters Sequential logic – analysis and design Introduction to RTL Design RTL Design Examples, RAM FPGA Overview


Planned Learning Activities and Teaching Methods
Activities are given in detail in the section of "Assessment Methods and Criteria" and "Workload Calculation"

Assessment Methods and Criteria
In-Term Studies Quantity Percentage
Yarıl yılSonu Sınavı/Dönem Projesinin Başarı Notuna Katkısı 1 % 25
Quiz/Küçük Sınav 5 % 10
Ödev 5 % 10
Proje/Çizim 2 % 25
Final examination 1 % 30
Total
14
% 100

 
ECTS Allocated Based on Student Workload
Activities Quantity Duration Total Work Load
Yazılı Sınav 1 3 3
Grup Projesi 2 20 40
Ev Ödevi 8 3 24
Kısa Sınav 5 2 10
Yüz Yüze Ders 14 3 42
Total Work Load   Number of ECTS Credits 4 119

 
Course Learning Outcomes: Upon the successful completion of this course, students will be able to:
NoLearning Outcomes
1 Analyze and design combinational logic circuits.
2 Analyze and design sequential logic circuits.
3 Analyze behaviors of finite state machines by deriving state diagrams.
4 Design finite state machines for given specifications.

 
Weekly Detailed Course Contents
WeekTopicsStudy MaterialsMaterials
1 Introduction to digital design
2 Number systems
3 Logic gates
4 Boolean algebra
5 Logic simplification
6 Combinational logic design
7 Combinational logic design
8 Midterm exam
9 Sequential logic – latches and flip-flops
10 Sequential logic – registers and counters
11 Sequential logic – analysis and design
12 Sequential logic – analysis and design
13 Register transfer
14 Memory

 
Contribution of Learning Outcomes to Programme Outcomes
P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12
C1 5 5 4 1 1 1 5 1 1 2 4 1
C2 5 5 4 1 1 1 5 1 1 2 4 1
C3 5 5 4 1 1 1 5 1 1 2 4 1
C4 5 5 4 1 1 1 5 1 1 2 4 1

  Contribution: 1: Very Slight 2:Slight 3:Moderate 4:Significant 5:Very Significant

  
  https://sis.agu.edu.tr/oibs/bologna/progCourseDetails.aspx?curCourse=78383&lang=en
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