Course Details

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Course Information
SemesterCourse Unit CodeCourse Unit TitleT+P+LCreditNumber of ECTS CreditsLast Updated Date
3EE203DIGITAL DESIGN3+0+03414.08.2025

 
Course Details
Language of Instruction English
Level of Course Unit Bachelor's Degree
Department / Program COMPUTER ENGINEERING
Type of Program Formal Education
Type of Course Unit Compulsory
Course Delivery Method Face To Face
Objectives of the Course The objective of this course is to familiarize the student with fundamental principles of digital design. It provides coverage of classical hardware design for both combinational and sequential logic circuits. In the combinational logic circuits, logic gates, minimization techniques, arithmetic circuits are explained. In the sequential circuits: flip-flops, synthesis of sequential circuits, and case studies, including counters, registers, and random-access memories are presented.
Course Content To analyze and design combinational logic circuits.
To analyze and design sequential logic circuits.
To analyze behaviors or finite state machines by deriving state diagrams
Course Methods and Techniques
Prerequisites and co-requisities None
Course Coordinator None
Name of Lecturers Asist Prof.Dr. ABDULKADİR KÖSE abdulkadir.kose@agu.edu.tr
Assistants None
Work Placement(s) No

Recommended or Required Reading
Resources T. L. Floyd, “Digital Fundamentals,” 11th Ed., Pearson, 2015
M. M. Mano, C. R. Kime, T. Martin, “Logic and Computer Design Fundamentals,” 5th Ed., Pearson, 2015
Course Notes M. M. Mano, C. R. Kime, T. Martin, “Logic and Computer Design
Fundamentals,” 5th Ed., Pearson, 2015

Course Category
Engineering %100

Planned Learning Activities and Teaching Methods
Activities are given in detail in the section of "Assessment Methods and Criteria" and "Workload Calculation"

Assessment Methods and Criteria
In-Term Studies Quantity Percentage
Yarıl yılSonu Sınavı/Dönem Projesinin Başarı Notuna Katkısı 1 % 30
Quiz/Küçük Sınav 6 % 10
Ödev 8 % 30
Final examination 1 % 30
Total
16
% 100

 
ECTS Allocated Based on Student Workload
Activities Quantity Duration Total Work Load
Yazılı Sınav 1 2 2
F2F Dersi 15 3 45
Ev Ödevi 8 3 24
Kısa Sınav 6 1 6
Araştırma 3 5 15
Kişisel Çalışma 10 1 10
Ders dışı çalışma 15 1 15
Final Sınavı 1 2 2
Total Work Load   Number of ECTS Credits 4 119

 
Course Learning Outcomes: Upon the successful completion of this course, students will be able to:
NoLearning Outcomes
1 Belirli problemleri çözmek amacıyla kombinasyonel mantık devreleri tasarla ve optimize et.
2 Design sequential logic circuits to perform specific tasks, including
3 Demonstrate the skill to derive state diagrams to represent the behavior of FSMs for various applications

 
Weekly Detailed Course Contents
WeekTopicsStudy MaterialsMaterials
1 Introduction to Digital Design
2 Number Systems
3 Logic Gates
4 Boolean Algebra
5 Logic Simplification
6 Combinational Logic
7 Combinational Logic (cont’d)
8 Break
9 Midterm Exam
10 Sequential Logic – Latches and Flip-Flops
11 Sequential Logic – Registers and Counters
12 FSM – Analysis and Design
13 FSM – State Machine Diagram
14 FSM – State Machine Diagram (cont’d)
15 Register Transfer
16 Memory Basics

 
Contribution of Learning Outcomes to Programme Outcomes
P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15
C1 5 4 5 5 1 4 4 2 4 3 4 5 4 5 1
C2 5 4 5 5 1 4 4 2 4 3 4 5 4 5 1
C3 5 4 5 5 1 4 4 2 5 3 4 3 4 5 1

  Contribution: 1: Very Slight 2:Slight 3:Moderate 4:Significant 5:Very Significant

  
  https://sis.agu.edu.tr/oibs/bologna/progCourseDetails.aspx?curCourse=78309&lang=en
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